Ø Minimum 7-8 years of ASIC logic design experience
Ø Experienced with CAD tools to integrated analog and digital cores including microprocessors
Ø Capable of TOP integration & simulation, RTL coding, Verilog HDL (Design Language), Verilog/Synopsys (Design Compiler)/STA and open tool flow
Ø Capable of executing overall logic design flow and supporting product development/qualification/mass production from design perspective.
Ø Ability to effectively communicate with other functional teams in foreign locations in spoken and written English